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Add the AVX10 target features #139675

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Add the AVX10 target features #139675

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sayantn
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@sayantn sayantn commented Apr 11, 2025

Parent #138843

Adds the avx10_target_feature feature gate, and avx10.1 and avx10.2 target features.

It is confirmed that Intel is dropping AVX10/256 (see this comment), so this should be safe to implement now.

The LLVM fix for llvm/llvm-project#135394 was merged, and has been backported to LLVM20, we just need a llvm patch in rustc for it to be completely resolved

@rustbot label O-x86_64 O-x86_32 A-target-feature A-SIMD

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rustbot commented Apr 11, 2025

r? @BoxyUwU

rustbot has assigned @BoxyUwU.
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@rustbot rustbot added S-waiting-on-review Status: Awaiting review from the assignee but also interested parties. T-compiler Relevant to the compiler team, which will review and decide on the PR/issue. A-SIMD Area: SIMD (Single Instruction Multiple Data) A-target-feature Area: Enabling/disabling target features like AVX, Neon, etc. O-x86_32 Target: x86 processors, 32 bit (like i686-*) (IA-32) O-x86_64 Target: x86-64 processors (like x86_64-*) (also known as amd64 and x64) labels Apr 11, 2025
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"avx512vl",
"avx512vnni",
"avx512vpopcntdq",
"gfni", // This is a deviation from LLVM, but it is more consistent with the Intel specification
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Is this known by LLVM folks? Is there an llvm issue?

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@sayantn sayantn Apr 11, 2025

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I have opened llvm/llvm-project#135394, I will file an issue in GCC bugtracker too. Also cc @rust-lang/wg-llvm ig

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Ok this is an issue on LLVM side, and a PR has been sent to fix this. So should we add these target features now, or when the LLVM fix lands? Imo it is not a problem if we add it now, it will just stop implying vaes and vpclmulqdq after the fix

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The LLVM fix was merged and is scheduled to be backported to LLVM20

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BoxyUwU commented Apr 14, 2025

r? compiler

@rustbot rustbot assigned wesleywiser and unassigned BoxyUwU Apr 14, 2025
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A-SIMD Area: SIMD (Single Instruction Multiple Data) A-target-feature Area: Enabling/disabling target features like AVX, Neon, etc. O-x86_32 Target: x86 processors, 32 bit (like i686-*) (IA-32) O-x86_64 Target: x86-64 processors (like x86_64-*) (also known as amd64 and x64) S-waiting-on-review Status: Awaiting review from the assignee but also interested parties. T-compiler Relevant to the compiler team, which will review and decide on the PR/issue.
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